IEEE Trans Neural Netw Learn Syst - An Experimentation Platform for On-Chip Integration of Analog Neural Networks: A Pathway to Trusted and Robust Analog/RF ICs.

Tópicos

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Resumo

We discuss the design of an experimentation platform intended for prototyping low-cost analog neural networks for on-chip integration with analog/RF circuits. The objective of such integration is to support various tasks, such as self-test, self-tuning, and trust/aging monitoring, which require classification of analog measurements obtained from on-chip sensors. Particular emphasis is given to cost-efficient implementation reflected in: 1) low energy and area budgets of circuits dedicated to neural networks; 2) robust learning in presence of analog inaccuracies; and 3) long-term retention of learned functionality. Our chip consists of a reconfigurable array of synapses and neurons operating below threshold and featuring sub-?W power consumption. The synapse circuits employ dual-mode weight storage: 1) a dynamic mode, for fast bidirectional weight updates during training and 2) a nonvolatile mode, for permanent storage of learned functionality. We discuss a robust learning strategy, and we evaluate the system performance on several benchmark problems, such as the XOR2-6 and two-spirals classification tasks.

Resumo Limpo

discuss design experiment platform intend prototyp lowcost analog neural network onchip integr analogrf circuit object integr support various task selftest selftun trustag monitor requir classif analog measur obtain onchip sensor particular emphasi given costeffici implement reflect low energi area budget circuit dedic neural network robust learn presenc analog inaccuraci longterm retent learn function chip consist reconfigur array synaps neuron oper threshold featur subw power consumpt synaps circuit employ dualmod weight storag dynam mode fast bidirect weight updat train nonvolatil mode perman storag learn function discuss robust learn strategi evalu system perform sever benchmark problem xor twospir classif task

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